**Overview**
Cornelis Networks, Inc. is revolutionizing high-performance networking for AI and HPC datacenters worldwide. We're seeking a seasoned Sr. ASIC Design Engineer to join our innovative team in developing cutting-edge Ethernet host adaptor solutions. This remote position offers the opportunity to work on world-class SoCs that power breakthrough AI and HPC workloads for global customers.
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Responsibilities **
• Design microarchitecture specifications for packet processors and high-speed pipelined data paths, prioritizing ultra-low latency performance • Create RTL implementations using Verilog/System Verilog for advanced data paths and packet processing systems • Partner with verification teams to develop comprehensive block and system-level testing strategies • Establish timing constraints for RTL components and collaborate with Physical Design teams on timing optimization • Provide post-silicon validation support, working cross-functionally with hardware, firmware, and software teams for issue resolution • Drive performance enhancement and power-efficient design approaches for Host Fabric Interface subsystems
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Requirements **
• Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or equivalent field • 7+ years of professional digital design experience with strong Verilog and System Verilog skills • Proven background in RTL design for high-speed data paths or ASIC packet processing • Comprehensive knowledge of Host Ethernet adaptor architectures •
Experience with timing closure processes and contemporary physical design approaches • Demonstrated expertise in system-level debugging and technical problem resolution • Excellent communication abilities, both written and verbal • Preferred: Understanding of Ethernet architecture and networking protocols including TCP/IP, RDMA/RoCE, and IPSec
Monday to Friday, 9 AM – 5 PM (full-time)
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